| Pin |
Name |
Description |
| 1 |
TEXT |
Video text signal from TMG; set to inverse of GR, except in double high-resolution mode. |
| 2 |
14M |
14M master timing signal from the system oscillator. |
| 3 |
SYNC* |
Displays horizontal and vertical synchronization signal from IOU pin 39. |
| 4 |
SEGB |
Displays vertical counter bit from IOU pin 4; in text mode, indicates second low-order vertical counter; in graphics mode, indicates low-resolution. |
| 5 |
1VSOUND |
One-volt sound signal from pin 5 of the audio hybrid circuit (AUD). |
| 6 |
LDPS* |
Video shift-register load enable from pin 12 of TMG. |
| 7 |
WNDW* |
Active area display blanking; includes both horizontal and vertical blanking. |
| 8 |
+12V |
Regulated +12 volts DC; can drive 300mA. |
| 9 |
PRAS* |
RAM row-address strobe from TMG pin 19. |
| 10 |
GR |
Graphics mode enable from IOU pin 2. |
| 11 |
SEROUT* |
Serialized character generator output from pin 1 of the 74LS166 shift register. |
| 12 |
NTSC |
Composite NTSC video signal from VID hybrid chip. |
| 13 |
GND |
Ground reference and supply. |
| 14 |
VIDD7 |
From 74LS374 video latch; causes half-dot shift high. |
| 15 |
CREF |
Color reference signal from TMG pin 3; 3.58 MHz. |